Session 1.6

September 10, 2024 from 3:30 pm to 3:50 pm

Speaker: Andes

Title: Verifying Configurable AndesCore Processors by Using Portable Testing and Stimulus Standard (PSS)

Speaker: Luther Kai Xuan Lee, Andes

This session will be presented in Mandarin

To accommodate the wide range of applications, AndesCore processors provide comprehensive configuration options to meet various requirements. However, this configurability introduces a significant challenge in verification processes, particularly in generating various test scenarios. These scenarios include instruction execution with pipeline hazards or instruction decoding with versatile configurations. The Portable Testing and Stimulus Standard (PSS) introduced a domain-specific language (DSL) for describing test scenarios, enabling the automatic creation of multiple test scenarios. Nonetheless, the current PSS-based test generation tools, typically vendor-derived, require licensing fees and primarily cater to system verification rather than processor verification.

To address these limitations, we developed a PSS-based test generation tool for verifying AndesCore processors. Its efficacy is demonstrated through two case studies: 1) pipeline forwarding, and 2) instruction decoding for vector extension. Notably, we made this tool openly available on GitHub, fostering transparency and community engagement.