Session 1.5

September 10, 2024 from 3:10 pm to 3:30 pm

Speaker: Silicon Interfaces

Title: Exploring Token-Based Strategies to Enhance Data Security and Memory Management in PCIe Devices

The papers demonstrates a solution for the work around using higher memory locations in PCIe for single calls to the configuration address and data I/O ports CF8 and CFC (intel chip set IO ports); the issues on data integrity and security is further compounded when multiple CPUs are connect to the Bus0 of the Root Complex! Memory management using Address Space, Address Regions and Traits, as well as Byte Addressability on PCIe particularly in multi-Core environment wherein several CPUs or Cores may accesses data from Memory through the Root Complex Hub using CF8 and CFC ports and successfully addressing data integrity and security issues To prevent such issues and safeguard device data, we leveraged the features of PSS v2.0 like replicate and repeat , constraint for all and many more implement to access to CF8 and CFC addresses and data signals when multiple devices access CPU system memory for data threading, parameterized traits, resource sharing and locking ensure proper synchronization, preventing race conditions. Further, allocation of the Address Space region (Contiguous Byte Addressable) for TYPE0 or TYPE1 Configuration memory space (256 bytes to 4Kbytes extended configuration space) is achieved using Byte Addressability. PCIe devices claim this Configuration Space region (256 to 4kbytes) for operation when needed, utilizing an allocation trait size 1K bytes to define and match regions. Configuration Space with traits that satisfy the claim’s trait constraints is the candidate for matching regions. Through this approach, we provide clarity on our proposal while highlighting the practical implications for enhancing memory management and data protection in PCIe devices.

Speaker: Lakshya Miglani, Silicon Interfaces

Lakshya Miglani is a Researcher, implementing new technologies product ideas at Silicon Interfaces. His areas of expertise are in Design of RISC based ALU architecture, Methodologies based Verification and Portable Stimulus. Lakshya lives in Navi Mumbai and spends time on weekends with friend and family!