Paper 2.7 – Tutorial – Model Based Design

September 7, 2023 from 5:00 pm to 5:30 pm

Speaker: Dr. Alan P. Su - eNeural

Session Chair: Prosper Chen, AMD

Tutorial : Model-Based Design, the Top-Level System Design Method

Language : English

Abstract: Any system design starts from math, and Model-Based Design (MBD) is to model the target system mathematically and formally, thus MBD is the top-level design method. And yet the model created must be an executable one to verify the target system formally to ensure it meets the system specification. This formalism is especially important in safety critical systems like vehicles, vessels, and airplanes. In this tutorial we will go through the definition of Model-Based Design, a short history of it and one of the most widely used model-based language today, the Synchronous Data Flow created by Prof. Edward A. Lee of EECS, UC Berkeley.

Speaker : Dr. Alan P. Su

Alan P. Su is an expert in system level design & verification with 21 years experiences. He received his bachelor degree in computer science from Chung-Yuan Christian University in 1986. He went to the States and received M.S. degree from University of Missouri Rolla in 1994 and doctorate from University of California Riverside in 1998. Between 1998 and 2002 he worked for EEsof, Hewlett-Packard Company, later spun off to become Agilent, to develop various system level design tools, including High Level Synthesis, System Simulator and Architecture Explorer.
In 2003 he returned to Taiwan and joined SoC Technology Center, ITRI to conduct several ESL projects in tool development, SoC designing and design methodologies. While remained as a consultant with ITRI, in April 2006 he joined SpringSoft, Inc. to lead the development of system level design & verification tools. In August 2008 he joined Global Unichip Corp, pioneered and developed a Virtual/Emulative/Physical hybrid SW/HW co-debug platform to provide system level design & verification services. In June 2011 he joined Synopsys Taiwan to promote system level solutions in the Asia Pacific region. Starting January 2013 Dr. Su teaches and conducts research in DSP IP design method research with EE/NCKU. And in 2020 he joined EE/NYCU (then NCTU) to help starting up a new venture in embedded AI solutions and in March 2022 eNeural Technologies is founded and Dr. Su takes the responsibilities of Chief Operations Officer and R&D Vice President.
Dr. Su involves in various system level design & verification standardization efforts. He was a member of Accellera Transaction Level Modeling (TLM) Working Group, Synthesis Working Group, Configuration, Control and Inspection Working Group, Language Working Group and OCP-IP Debug Working Group. He has been assigned as Accellera Representative to Taiwan Region since April, 2013. He was also the Chair of ESL Working Group, Taiwan SoC Consortium circa 2008 to 2012.

Dr. Su’s research interest includes system level design & verification, synthesis, debug, testing and design methodologies. His research and expertise also cover distributed and parallel computing, leakage current minimization and 3D IC.